This invention relates to the field of wireless integrated circuits.
The demand for low-cost, reliable wireless communications continues to increase at a rapid rate, as do the demands on the technologies enabling such communications. Chip designers work on many fronts to find ways to make the circuitry found inside devices such as cellular phones smaller, cheaper, easier to fabricate, less power-hungry, and more reliable.
One major component in a cellular phone is a radio frequency (RF) transceiver. U.S. Pat. No. 6,049,702 shows a block diagram of the RF/analog and analog/digital (A/D) interface circuitry of a basic transceiver, which can be combined with other components (not shown) to form a complete transceiver. The transmitter portion of the transceiver includes digital-to-analog converters (DACs), low-pass filters for filtering the outputs of DACs, respectively, and a modulator that performs a frequency conversion on signals received at its inputs and which is driven by a phase-locked loop (PLL) circuit that includes a reference voltage-controlled-oscillator (VCO) and a resonator (tank circuit). The modulator""s output is fed to a power amplifier, and the amplified output is fed to one side of a transmit/receive (T/R) switch, filtered with a bandpass filter, and connected to an antenna.
The receiver portion is connected to the other side of T/R switch. Incoming signals are received by the antenna and filtered by the bandpass filter before being fed to a low-noise amplifier (LNA)/demodulator circuit. The output of the circuit""s LNA is passed through a bandpass filter before being fed to a demodulator which performs a frequency conversion on the signal received by antenna. The demodulator is driven by a PLL circuit which includes a reference VCO and a tank circuit. The demodulator output drives an intermediate-frequency automatic gain control (IF AGC) stage, with a bandpass filter interposed between the stage""s IF amplifier and its AGC circuitry. The AGC output is fed to an IF demodulator which is driven by a PLL circuit that includes a reference VCO and a tank circuit. The IF demodulator""s two outputs are passed through respective low-pass filters before being fed to respective analog-to-digital converters (ADCs).
Current RF transceivers are implemented using a variety of device technologies For example, DACs, ADCs, and all other digital baseband transceiver circuitry are typically CMOS circuits. The modulator, LNA/demodulator, IF/AGC stage, and IF demodulator generally use bipolar junction transistors (BJTs). The power amplifier can be fabricated on a gallium arsenide (GaAs) substrate, particularly for a high-power application such as a cellular phone Bandpass, lowpass filters, as well as tank circuits, and antenna are generally built with discrete components. T/R switch is also typically made from discrete components, or are made from costly, complex PIN diode circuits if integrated.
Because a variety of technologies must be combined, current transceivers typically requires multiple integrated circuits (IC). For example, a CDMA or WCDMA RF front end typically consists of two ICs. There is a receive IC and a transmit IC, which need to be on separate pieces of silicon to isolate the low power received signal (around 10 mW) from the high power send signal (around 300 mW). With a processor IC to control the RF front-end, the electronic of an RF system requires three chips: a processor IC, a receive IC, and a transmit IC. These ICs add cost and can result in an assembly is typically larger than is desired, particularly when the limited space and weight requirements imposed on designers of battery-powered handheld devices must be met.
In one aspect, a set of radio frequency (RF) integrated circuits includes a transmit chip having a power amplifier and a receive chip adapted to work with the transmit chip. The receive chip has one or more low noise amplifiers to receive RF signals, and a processor coupled to the low noise amplifiers, the processor transmitting data through the transmit chip and receiving data from the on-chip low noise amplifiers.
In another aspect, a radio frequency transceiver system includes a transmit chip; and a receive chip having a transistor device. The transistor device includes a layer of gate oxide on a surface of the semiconductor substrate, a gate electrode formed on the surface of the gate oxide, the gate electrode having a drain side; a p-well implanted within a semiconductor substrate under the gate electrode; an n-well implanted in the p-well on the drain side; an n+ source region in the p-well outside of the n-well; an n+ drain region within the substrate inside the n-well; and lightly doped regions extending respectively from the source and drain regions toward the gate electrode.
Implementations of the device may include one or more of the following. The n-well extends slightly under the gate electrode. The p-well is deeper than the n-well. A second device can be fabricated adjacent the first device with a second gate electrode formed on the surface of the gate oxide; a second n-well implanted within a semiconductor substrate under the second gate electrode; a p+ source region in the second n-well; and a p+ drain region within the substrate inside the second n-well The second n-well is adjacent the p-well. The first and second n-wells are formed at the same time. The device can be used in digital circuits that operate next to sensitive analog circuits such as CMOS imaging elements, precision analog-digital converters, or radio frequency circuits
In another aspect, a method for manufacturing a two-chip radio frequency transceiver system with a receive chip having a transistor device. The transistor device a metal oxide semiconductor transistor device includes implanting a p-well in a substrate; implanting an n-well in the p-well; growing a gate oxide above the p-well; forming a polysilicon layer on the gate oxide; implanting a p+ region in the substrate; and implanting an n+ region in the substrate.
Implementations of the above aspect may include one or more of the following. The method includes forming lightly doped regions extending respectively from the source and drain regions toward the gate electrode. The method also includes forming an isolation layer between the substrate and the gate oxide. The method includes patterning the polysilicon layer. The method also includes patterning the p+ region and the n+ region. The method forms robust devices that can used in digital circuitry adjacent analog circuitry. The analog circuit can be imaging elements, analog to digital converters or a radio frequency circuits, among others.
Advantages of the device can include one or more of the following. The system is a 2 chip solution instead of a 3 chip solution, saving weight, cost, and board real-estate. These advantages are important for mobile applications such as handheld computers and cellular telephones, among others. The baseband chip has several process steps that can be used to enhance the performance of a low-power RF detector. For example, as discussed below, the circuits use implants that can reduce hot electrons, and also a very thin oxide layer that can be used to make low voltage high performance transistors. The system also uses reliable and inexpensive MOSFETs. The MOSFETs can be used in mixed-mode integrated circuits (ICs) that include both digital and analog circuits on a single chip. The device reduces the magnitude of electric field seen along the channel near the drain of an MOS device, especially in digital transistors which switch at high frequency. The device also avoids the hot electron injection problem without creating sharp curvatures on the junction and without an additional long drive-in time that can cause undesired thermal effects in the other parts of the device. The resultant low junction curvature increases the breakdown voltage, making it possible to operate the transistor at higher biases without catastrophic failure. The inventive process also forms source/drain regions having low series resistance and a large junction radius, and which does not require additional masking or heating steps.